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NOTA: è possibile cercare una corrispondenza esatta usando i doppi apici, ad es: "evoluzione della specie". Qualora si cerchi un identificativo, è consigliabile cercarlo in due modi differenti: tra apici con caratteri speciali es: "978-94-6366-274" oppure senza caratteri speciali solo come sequenza numerica: es 978946366274.
Design technology for fault-free and maximally-parallel wavelength-routed optical networks-on-chip
2016 Peano, Andrea; Ramini, Luca; Gavanelli, Marco; Nonato, Maddalena; Bertozzi, Davide
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
file con accesso da definire2009 F., Gilabert; Ludovici, Daniele; Medardoni, Simone; Bertozzi, Davide; L., Benini; G. N., Gaydadjiev
Dyafnoc: Dynamically reconfigurable noc characterization using a simple adaptive deadlock-free routing algorithm with a low implementation cost
2015 Ernesto Villegas, Castillo; Miorandi, Gabriele; Bertozzi, Davide; Wang, Jiang Chau
Dynamically Reconfigurable NoC using a deadlock-free flexible routing algorithm with a low hardware implementation cost
file con accesso da definire2015 Ernesto, Villegas Castillo; Wang, Jiang Chau; Miorandi, Gabriele; Bertozzi, Davide
Effectiveness of adaptive supply voltage and body bias as post-silicon variability compensation techniques for full-swing and low-swing on-chip communication channels
file con accesso da definire2009 G., Paci; Bertozzi, Davide; L., Benini
Efficient Resource-Aware Neural Architecture Search with a Neuro-Symbolic Approach
file con accesso da definire2023 Bellodi, Elena; Bertozzi, Davide; Bizzarri, Alice; Favalli, Michele; Fraccaroli, Michele; Zese, Riccardo
Energy-efficient and reliable low-swing signaling for on-chip buses based on redundant coding
file con accesso da definire2002 Bertozzi, Davide; Benini, L; Ricco', B.
Engineering a Bandwidth-Scalable Optical Layer for a 3D Multi-core Processor with Awareness of Layout Constraints
file con accesso da definire2012 Ramini, Luca; Carloni, Luca; Bertozzi, Davide
Evolutionary vs. Revolutionary Interconnect Technologies for Future Low-Power Multi-Core Systems
2016 Miorandi, G; Tala, M; Balboni, M; Ramini, L; Bertozzi, D
Exploiting Network-on-Chip Structural Redundancy for A Cooperative and Scalable Built-In Self-Test Architecture
file con accesso da definire2011 Strano, Alessandro; C. G., Requena; Ludovici, Daniele; M. E., Gomez; Favalli, Michele; Bertozzi, Davide
Legenda icone
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- file disponibili solo agli amministratori
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Opzioni
Scopri
Tipologia
- 04 Atto di Convegno (Proceedings) 125
- 04 Atto di Convegno (Proceedings)... 125
Data di pubblicazione
- 2020 - 2023 11
- 2010 - 2019 75
- 2002 - 2009 39
Editore
- IEEE 42
- Institute of Electrical and Elect... 19
- ACM/IEEE 15
- IEEE Computer Society 14
- ACM 9
- ACM / Association for Computing M... 5
- Association for Computing Machinery 4
- Springer 2
- Springer Berlin Heidelberg 2
- Academia Press - Hipeac NoE 1
Rivista
- LECTURE NOTES IN COMPUTER SCIENCE 1
Serie
- PROCEEDINGS - DESIGN, AUTOMATION,... 3
- LECTURE NOTES IN COMPUTER SCIENCE 2
- PROCEEDINGS - GREAT LAKES SYMPOSI... 2
- ... IEEE ... INTERNATIONAL SYMPOS... 1
- IEEE INTERNATIONAL INTEGRATED REL... 1
- INTERNATIONAL CONFERENCE ON TRANS... 1
- PROCEEDINGS DESIGN, AUTOMATION, A... 1
- PROCEEDINGS OF THE ASP-DAC ... AS... 1
Keyword
- network-on-chip 7
- GALS 4
- Network-on-Chip 4
- Asynchronous 3
- network on chip 3
- Networks-on-Chip 3
- silicon photonics 3
- dual-clock FIFO 2
- Hardware and Architecture 2
- nanophotonics 2
Lingua
- eng 125
Accesso al fulltext
- no fulltext 92
- reserved 31
- open 1
- partially open 1