This chapter aims at giving an overview of the most important reliability issues affecting the floating gate memory technology which are the key elements whose evaluation is on the basis of each ECC strategy. Reliability issues will be discussed by considering the single cell first (intrinsic cell degradation) and then by introducing all the important effects derived from considering a large array of cells. As it will be shown, many parasitic physical mechanisms can show up in a scaled floating gate cell, but their actual impact on reliability can be different depending on the array architecture. The main reliability issues that will be discussed are: intrinsic oxide degradation, data retention, endurance, tail bit, fast bits and erratic bits, read and program disturbs.

Reliability of Floating Gate Memories

CHIMENTON, Andrea;OLIVO, Piero
2008

Abstract

This chapter aims at giving an overview of the most important reliability issues affecting the floating gate memory technology which are the key elements whose evaluation is on the basis of each ECC strategy. Reliability issues will be discussed by considering the single cell first (intrinsic cell degradation) and then by introducing all the important effects derived from considering a large array of cells. As it will be shown, many parasitic physical mechanisms can show up in a scaled floating gate cell, but their actual impact on reliability can be different depending on the array architecture. The main reliability issues that will be discussed are: intrinsic oxide degradation, data retention, endurance, tail bit, fast bits and erratic bits, read and program disturbs.
2008
9781402083907
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11392/533575
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