This chapter addresses NI architecture and design issues, leveraging a number of case studies. It presents interface protocols at the frontend of NI architectures as the result of a long evolutionary path of SoC communication protocols. Moreover, it shows some implementation approaches to packetization, from traditional wrapper-based solutions up to the potential solutions opened by the latest developments in processor interfaces. This chapter then analyzes the impact that design choices taken at the NI might have on system-level performance, area and power: from packet size and flit width all the way to flow control schemes and switching techniques. Finally, three representative case studies are presented, addressing design issues of NIs for QoS-oriented, BE, and asynchronous NoCs. Through the area and power breakdown of NI prototypes, the reader is able to understand where complexity arises in the architecture, and is led to assess the fraction of area and power NIs consume in real platform implementations using NoCs.

Network Interface Architecture and Design Issues

BERTOZZI, Davide
2006

Abstract

This chapter addresses NI architecture and design issues, leveraging a number of case studies. It presents interface protocols at the frontend of NI architectures as the result of a long evolutionary path of SoC communication protocols. Moreover, it shows some implementation approaches to packetization, from traditional wrapper-based solutions up to the potential solutions opened by the latest developments in processor interfaces. This chapter then analyzes the impact that design choices taken at the NI might have on system-level performance, area and power: from packet size and flit width all the way to flow control schemes and switching techniques. Finally, three representative case studies are presented, addressing design issues of NIs for QoS-oriented, BE, and asynchronous NoCs. Through the area and power breakdown of NI prototypes, the reader is able to understand where complexity arises in the architecture, and is led to assess the fraction of area and power NIs consume in real platform implementations using NoCs.
2006
9780123705211
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11392/497248
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