A high performance single chip processing unit for parallel processing and data acquisition systems

We present a new VLSI integer scalar processor, intended to be used primarily as the controller of the APE100 massively parallel processor. Its open and flexible architecture indicates a potential for use in other HEP applications, such as front-end processing or data readout. © 1993.

Data di pubblicazione: 1993
Titolo: A high performance single chip processing unit for parallel processing and data acquisition systems
Autori: BASTIANELLO G; BORGOGNONI R; BATTISTA C; CABASINO S; CABIBBO N; FUCCI A; LAI A; MARZANO F; PAOLUCCI PS; PECH J; SARNO R; TODESCO GM; TORELLI M; R. TRIPICCIONE; TROSS W; VICINI P
Rivista: NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH. SECTION A, ACCELERATORS, SPECTROMETERS, DETECTORS AND ASSOCIATED EQUIPMENT
Abstract: We present a new VLSI integer scalar processor, intended to be used primarily as the controller of the APE100 massively parallel processor. Its open and flexible architecture indicates a potential for use in other HEP applications, such as front-end processing or data readout. © 1993.
Digital Object Identifier (DOI): 10.1016/0168-9002(93)91058-U
Handle: http://hdl.handle.net/11392/463350
Appare nelle tipologie:03.1 Articolo su rivista

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