We present a new VLSI integer scalar processor, intended to be used primarily as the controller of the APE100 massively parallel processor. Its open and flexible architecture indicates a potential for use in other HEP applications, such as front-end processing or data readout. © 1993.
A high performance single chip processing unit for parallel processing and data acquisition systems
TRIPICCIONE, Raffaele;
1993
Abstract
We present a new VLSI integer scalar processor, intended to be used primarily as the controller of the APE100 massively parallel processor. Its open and flexible architecture indicates a potential for use in other HEP applications, such as front-end processing or data readout. © 1993.File in questo prodotto:
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