Relaxed germanium epilayers on porous silicon buffers for low dislocation content Ge on Si virtual substrates

While silicon represents the dominant material in the semiconductor industry, the continuous improvement in the performance of Si based devices is reaching its upper bound due to the approaching of insuperable physical limitations intrinsic to Si, which requires the introduction of new semiconductor materials and the development of new assembly techniques to guarantee the future performance improvement and reduction in fabrication costs. The integration of high-quality germanium epilayers on Si substrates has received great attention from the semiconductor community due to the chance to extend the range of performance offered by Si-based technology by taking advantage of both the superior properties of Ge such as a higher carrier mobility, a lattice constant close to that of GaAs which enables III-V epitaxy and a quasi-direct bandgap, and of the possibility of strain and bandgap engineering offered by the formation of a heterojunction. To overcome the 4.2% lattice constant mismatch existing between Ge and Si which hamper the direct integration approach, this thesis investigates a novel technique for the realization of high-quality Ge on Si virtual substrates (VSs), consisting in the introduction of a porous silicon (pSi) buffer layer in between Ge and Si. pSi is a versatile, self-assembled, nanomaterial which can be realized at very high growth rates through electrochemical etching of Si. Thanks to its reduced Young’s and shear moduli pSi can deform during epitaxy, potentially alleviating part of the lattice mismatch between Ge and Si and reducing the density of misfit dislocations and associated threading segments necessary for complete Ge relaxation. Together with the very high throughput of the anodization process, other fundamental advantages of the proposed approach are its low cost, its simple scalability to large area Si substrates and the possibility to lift-off the grown epilayers from the starting substrates, giving Ge on pSi VSs the possibility to outperform other existing techniques for Ge integration on Si. During the course of this work, several Ge on pSi VSs have been grown through low energy plasma enhanced chemical vapor deposition (LEPECVD) technique, and the resulting crystalline quality has been compared to that of Ge on Si VSs. Using X-ray diffraction techniques, together with electron microscopy analysis and selective etching techniques, it will be shown how the main physical parameters of pSi buffers affect the crystalline quality of Ge heteroepilayers. Finally, it will be demonstrated that strong threading dislocation reduction is possible in Ge grown on low porosity pSi buffers compared to Ge on bulk Si, at parity of experimental conditions, and the main mechanisms responsible for crystalline quality improvement in Ge grown on pSi will be uncovered.