Networks-on-chip (NoCs) are key components in many-core chip designs. Dynamic power-awareness is a new challenge present in NoCs that must be efficiently handled by the routing functionality as it introduces irregularities in the commonly used 2-D meshes. In this paper, we propose a logic-based routing algorithm, iFDOR, oriented towards dynamic powering down one region within every application partition on the chip through dynamic rerouting, with low implementation costs. Results show that we can successfully shut- down an arbitrary rectangular region within an application partition without significant impact on network performance.

Enabling Power Efficiency through Dynamic Rerouting on-Chip

STRANO, Alessandro;BERTOZZI, Davide
2013

Abstract

Networks-on-chip (NoCs) are key components in many-core chip designs. Dynamic power-awareness is a new challenge present in NoCs that must be efficiently handled by the routing functionality as it introduces irregularities in the commonly used 2-D meshes. In this paper, we propose a logic-based routing algorithm, iFDOR, oriented towards dynamic powering down one region within every application partition on the chip through dynamic rerouting, with low implementation costs. Results show that we can successfully shut- down an arbitrary rectangular region within an application partition without significant impact on network performance.
2013
F. O., Sem Jacobsen; S., Rodrigo; Strano, Alessandro; T., Skeie; F., Gilabert; Bertozzi, Davide
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11392/1552005
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