Synchronization is today among the most critical challenges in the design of a global on-chip communication infrastructure,as emerging variability, signal integrity, power dissipation limits are contributing toa severe break-down of the global synchronicity assumption when a logical structure spans more than a couple of millimiters on a die. This chapter addressed globally asynchronous and locally synchronous architectures with emphasis on the implications for the communication fabric of largely integrated multicore systems.
The Synchronization Challenge
BERTOZZI, Davide;STRANO, Alessandro;LUDOVICI, Daniele;
2010
Abstract
Synchronization is today among the most critical challenges in the design of a global on-chip communication infrastructure,as emerging variability, signal integrity, power dissipation limits are contributing toa severe break-down of the global synchronicity assumption when a logical structure spans more than a couple of millimiters on a die. This chapter addressed globally asynchronous and locally synchronous architectures with emphasis on the implications for the communication fabric of largely integrated multicore systems.File in questo prodotto:
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