Electrical Characterization and Modeling of Phase Change Memory arrays

Phase Change Memory is one of the most promising emerging Non-Volatile Memory technology thanks to fast writing operations, long endurance and very good radiation hardness. Although a relevant effort is still being put on design optimization and material analysis, the PCM technology has today reached a significant level of maturity so that test chips containing multimegabit arrays of cells are commonly available for electrical characterization purposes. As a result, a significant amount of statistical information can be provided to the reliability/cell design engineer. The analysis of memory arrays allows the identification of additional/unexpected features which, otherwise, would be difficult to be induced from the analysis of single memory cells, being the actual behavior of the array much more complex and statistical in nature. In this talk we present experimental results collected on array of PCM cells whose analysis allowed the identification of new interesting features of the PCM technology. A physical interpretation of the observed phenomena will be suggested and new models will be presented. The dynamical behavior of an array during both writing operations (SET and RESET) will be described first. Afterwards, we will focus on the SET (erasing) operation where most of the interesting features have been observed: the statistical nature of the erasing curve, the observation of a delay time (or time to shunt formation), the presence of a Random Telegraph Signal on the SET endurance curves. All these features seem to be consistent with a filamentation picture of the crystallization process and, accordingly, we developed a new erasing model which has been successfully used for data analysis. A comparison between the suggested model and what has already been proposed in literature will be discussed.