A new approach, which takes into account both traps and thermal phenomena is proposed for the accurate modeling of deviations between static and dynamic (e.g., pulsed) drain current characteristics in III-V FETs. The model, which is based on the well known “backgating” concept, can easily be identified on the basis of conventional static drain current characteristics and small-signal, low-frequency S parameters. In the paper, the model formulation is developed along with some hints on its implementation in commercially available CAD tools for HB simulations. Experimental validation, consisting of comparisons between simulated and measured pulsed drain current characteristics, is also provided.