In this paper we present a macro-model for a true random number generator which internally exploits a pipeline analog-to-digital converter modified to operate as an interleaved chaotic map. The model is tuned to reproduce the non-idealities of a 0.35μm CMOS double-poly triple-metal technology. It is based on circuit-level simulations but is extremely more efficient and can be used to run the statistical tests to assure the quality of the output stream.
Scheda prodotto non validato
Attenzione! I dati visualizzati non sono stati sottoposti a validazione da parte dell'ateneo
Titolo: | A macro-model for the efficient simulation of an ADC-based RNG | |
Autori: | ||
Data di pubblicazione: | 2005 | |
Abstract: | In this paper we present a macro-model for a true random number generator which internally exploits a pipeline analog-to-digital converter modified to operate as an interleaved chaotic map. The model is tuned to reproduce the non-idealities of a 0.35μm CMOS double-poly triple-metal technology. It is based on circuit-level simulations but is extremely more efficient and can be used to run the statistical tests to assure the quality of the output stream. | |
Handle: | http://hdl.handle.net/11392/1195147 | |
ISBN: | 0780388348 | |
Appare nelle tipologie: | 04.2 Contributi in atti di convegno (in Volume) |
File in questo prodotto:
Non ci sono file associati a questo prodotto.
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.