requirements in terms of oscillator phase noise. Moreover, many applications market requirements drive towards low-cost, integrated voltage-controlled solutions in which high-Q components are not easily supported. Finally, during the last few years a deeper understanding has been achieved on noise mechanisms in oscillators both from a device and a circuit standpoint, and more accurate simulation approaches have been developed and implemented in available CAD tools. This enables device and circuit designers to exploit additional degrees of freedom in innovative oscillator design, provided of course that accurate noise device models are available for the oscillator active elements. This workshop provides a comprehensive overview on recent advances in several areas of low-noise oscillator design, starting from the physical foundations of oscillator noise and physics-based device-level noise simulation. Innovative approaches to circuit-level device modelling for oscillator phase noise analysis are then reviewed, also dealing with the measurement procedures needed for the transistor non-linear noise characterization. Some contributions on selected areas in oscillator design are also presented, by focussing on different possible choices in terms of device technologies and circuit topologies for the implementation of low phase noise, fully integrated VCO circuits. Finally, the relationships between timing jitter, which pays an important role in determining the bit-error-rate of communication systems and possible synchronization problems in clocked, sampled-data systems, and various kinds of spectral characterizations of phase noise generated in oscillators and PLLs will be analyzed and discussed.
Non-linear Measurement-Based Noise Models of Electron Devices for Low Phase-Noise Oscillator Design
VANNINI, Giorgio
2006
Abstract
requirements in terms of oscillator phase noise. Moreover, many applications market requirements drive towards low-cost, integrated voltage-controlled solutions in which high-Q components are not easily supported. Finally, during the last few years a deeper understanding has been achieved on noise mechanisms in oscillators both from a device and a circuit standpoint, and more accurate simulation approaches have been developed and implemented in available CAD tools. This enables device and circuit designers to exploit additional degrees of freedom in innovative oscillator design, provided of course that accurate noise device models are available for the oscillator active elements. This workshop provides a comprehensive overview on recent advances in several areas of low-noise oscillator design, starting from the physical foundations of oscillator noise and physics-based device-level noise simulation. Innovative approaches to circuit-level device modelling for oscillator phase noise analysis are then reviewed, also dealing with the measurement procedures needed for the transistor non-linear noise characterization. Some contributions on selected areas in oscillator design are also presented, by focussing on different possible choices in terms of device technologies and circuit topologies for the implementation of low phase noise, fully integrated VCO circuits. Finally, the relationships between timing jitter, which pays an important role in determining the bit-error-rate of communication systems and possible synchronization problems in clocked, sampled-data systems, and various kinds of spectral characterizations of phase noise generated in oscillators and PLLs will be analyzed and discussed.I documenti in SFERA sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
