The simulation of the erratic bits phenomenon in Flash memory arrays for reliability projections has been a matter of study in the last decade from many standpoints. However, the majority of the developed simulation framework lacked both a direct link with the physics underlying the phenomenon and an easy integration with circuit simulators for fast analysis. In this paper, we have developed a compact model for erratic events starting from the PSP-model description of a Flash cell using Verilog-A. The model has been focused on the reproduction of the overerase phenomenon in a 90-nm NOR Flash array. Its accurate and fast simulation capabilities allowed the evaluation of the array reliability against the erratic erase operation.

A Compact Model for Erratic Event Simulation in Flash Memory Arrays

ZAMBELLI, Cristian;OLIVO, Piero
2014

Abstract

The simulation of the erratic bits phenomenon in Flash memory arrays for reliability projections has been a matter of study in the last decade from many standpoints. However, the majority of the developed simulation framework lacked both a direct link with the physics underlying the phenomenon and an easy integration with circuit simulators for fast analysis. In this paper, we have developed a compact model for erratic events starting from the PSP-model description of a Flash cell using Verilog-A. The model has been focused on the reproduction of the overerase phenomenon in a 90-nm NOR Flash array. Its accurate and fast simulation capabilities allowed the evaluation of the array reliability against the erratic erase operation.
2014
Zambelli, Cristian; T., Vincenzi; Olivo, Piero
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11392/2203612
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